Weaved electrical components in a substrate package core

ABSTRACT

A substrate package includes a woven fabric having electrically non-conductive strands woven between electrically conductive strands including wire strands, co-axial strands, and/or an inductor pattern of strands. The package may be formed by an inexpensive and high throughput process that first weaves the non-conductive strands (e.g., glass) between the conductive strands to form a circuit board pattern of conductive strands in a woven fabric. Next, the woven fabric is impregnated with a resin material to form an impregnated fabric, which is then cured to form a cured fabric. The upper and lower surfaces of the cured fabric are subsequently planarized. Planarizing segments and exposes ends of the wire, co-axial, and inductor pattern strands. Since the conductive strands were formed integrally within the planarized woven fabric, the substrate has a high mechanical stability and provides conductor strand based electrical components built in situ in the substrate package.

CROSS-REFERENCE TO RELATED APPLICATION

The application is a divisional of co-pending U.S. patent applicationSer. No. 14/085,613, filed Nov. 20, 2013.

FIELD

Embodiments of the invention are related in general, to semiconductordevice packaging and, in particular, to substrate packages and printedcircuit board (PCB) substrates upon which an integrated circuit (IC)chip may be attached, and methods for their manufacture.

BACKGROUND

Integrated circuit (IC) chips (e.g., “chips”, “dies”, “ICs” or “ICchips”), such as microprocessors, coprocessors, and othermicroelectronic devices often use package devices (“packages”) tophysically and/or electronically attach the IC chip or die to a circuitboard, such as a motherboard (or motherboard interface). The die istypically mounted within a package that, among other functions, enableselectrical connections between the die and a socket, a motherboard, oranother next-level component.

These packages may be described as or include a substrate core, asubstrate package, an electronic device circuit board, a motherboard, ora printed circuit board (PCB) upon which an integrated circuit (IC) chipor die may be attached. These packages may serve as a base for themechanical support and electrical interconnection of semiconductordevices (e.g., integrated circuits). Such packages may include asheet-like base formed of an electrically non-conductive compositematerial (e.g., a glass material with epoxy resin) with a top and bottomsurface; and a number of electrically conductive vias, wires and/orplated through holes (PTH) extending from the top to the bottom surface.

These packages may be manufactured by initially forming a sheet-likebase of non-conductive material. The sheet-like base can be formed, forexample, by weaving glass fibers into a sheet of cloth or fabric. Thesheet of cloth is then dipped in resin and thermally cured to form thesheet-like base. Thereafter, via holes are mechanically drilled throughthe sheet-like base, plated and filled with an electrically conductivematerial (e.g., copper) to form electrically conductive vias (e.g.,plated through holes (PTH)). The mechanical drilling, plating andfilling process of some conventional processing are expensive, have alow throughput and result in a low yield. This is especially so when aPCB substrate with a large number of electrically conductive vias and/orelectrically conductive vias of small diameter is being manufactured.Furthermore, the act of mechanically drilling through the sheet-likebase, by itself, can inadvertently decrease the mechanical stability ofthe PCB substrate.

Still needed in the field, is an inexpensive and high throughput processfor manufacturing such packages. In addition, the process could resultin a high package yield and a package of high mechanical stability. Alsoneeded in the field, is a package having better components for providingstable and clean power, ground, and high frequency signals between itstop and bottom surfaces, such as to contacts on the surfaces that willbe electrically connected to an IC or motherboard.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments of the invention are illustrated by way of example andnot by way of limitation in the figures of the accompanying drawings inwhich like references indicate similar elements. It should be noted thatreferences to “an” or “one” embodiment of the invention in thisdisclosure are not necessarily to the same embodiment, and they mean atleast one.

FIG. 1A is a schematic cross-sectional top view of a circuit boardhaving non-conductive strands woven between conductive wire strands,co-axial strands, and inductor patterned strands, according toembodiments described herein.

FIG. 1B is a schematic cross-sectional side view of the circuit board ofFIG. 1A, according to embodiments described herein.

FIG. 2A shows conductive strands of FIGS. 1A and 1B having sets ofnon-conductive strands woven between them.

FIG. 2B shows an inductive pattern of wires of FIGS. 1A and 1B, havingsets of non-conductive strands woven between them.

FIGS. 3A and 3B are simplified top and side view representations,respectively, of a two-layer woven fabric produced by a weaving process,according to embodiments described herein.

FIG. 4 is a flow chart illustrating a process, according to embodimentsdescribed herein.

FIG. 5A shows a fabric for a circuit board having electricallynon-conductive strands woven between or with electrically conductivestrands, prior to resin impregnation, according to embodiments describedherein.

FIG. 5B shows the fabric of FIG. 5A after resin impregnation, accordingto embodiments described herein.

FIG. 5C shows the fabric of FIG. 5B after curing the resin andmechanical planarization of the top and bottom surface, according toembodiments described herein.

FIG. 6 illustrates a computing device in accordance with oneimplementation.

DETAILED DESCRIPTION

Several embodiments of the invention with reference to the appendeddrawings are now explained. Whenever the shapes, relative positions andother aspects of the parts described in the embodiments are not clearlydefined, the scope of embodiments of the invention is not limited onlyto the parts shown, which are meant merely for the purpose ofillustration. Also, while numerous details are set forth, it isunderstood that some embodiments of the invention may be practicedwithout these details. In other instances, well-known circuits,structures, and techniques have not been shown in detail so as not toobscure the understanding of this description.

Some embodiments herein describe circuit board devices (and systems)including a circuit board pattern (e.g., a woven cloth or fabric) havingelectrically non-conductive strands woven between electricallyconductive wire strands, co-axial strands, and/or inductor patternedstrands, and processes for their manufacture. In some cases, the circuitboard is a semiconductor device packaging and, in particular, asubstrate packages (or cores) or printed circuit board (PCB) substratesupon which an integrated circuit (IC) chip may be attached. In someembodiments, the strands may be solid wires, co-axial connectors, partof an inductor, and/or plated through holes (PTH) formed through acircuit board. In some cases, the wire strands, co-axial strands, and/orinductor patterned strands are described as weaved electrical componentsthat exist in a substrate package core.

Some embodiments described herein can provide various conductor strandbased features built in situ in the substrate package core that can actas electrical components. Such a package can include or provideinductors, co-axial PTH and standard copper filled PTH simultaneouslybuilt into the core. These features may be “inbuilt” into the substratecore during manufacturing of the circuit board (e.g., during weaving ofthe fabric), rather than embedding a discrete component after the resinof the board is cured, or the board is planarized. Building thecomponent features in to the substrate core can eliminate reliabilityconcern as well as substrate real estate concern that exist for priorpackages. Some embodiments described herein provide a packagearchitecture, and a process for forming such a package, that are ofcomparable cost to existing non-embedded substrate cost, and are ofcosts that are significantly lower than the embedded component basedsubstrate cost.

FIG. 1A is a schematic cross-sectional top view of a circuit boardhaving non-conductive strands woven between conductive wire strands,co-axial strands, and inductor patterned strands, according toembodiments described herein. FIG. 1B is a schematic cross-sectionalside view of the circuit board of FIG. 1A, according to embodimentsdescribed herein. Figures IA-B show circuit board 100 having circuitboard pattern 102 (e.g., a woven cloth or fabric) of non-conductivestrands 104, 106 and 108 woven between component patterns includinginductor wire strand pattern 110, conductive wire pattern 120, andco-axial wire pattern 130.

Circuit board 100 may be or include a circuit board upon which anintegrated circuit chip may be directly mounted. In some cases, thecircuit board is a semiconductor device package and, in particular, asubstrate package (or core) or printed circuit board (PCB) substrate. Insome cases, the circuit board may be or include a substrate core, asubstrate package, an electronic device circuit board, a motherboard, ora printed circuit board (PCB) upon which an integrated circuit (IC) chipmay be attached.

Circuit board 100 is shown having height H1, Length L1 and width W1.Circuit board 100 may include a footprint or shadow area of the IC chip.The footprint may be larger than and extend over the top cross sectionalarea of patterns 110, 120 and 130. In some cases, the footprint is lessthan L1 by W1. In some cases, the footprint covers the top crosssectional area of some of patterns of wire, coaxial and inductor patternstrands of board 100, but does not cover others.

Inductor pattern 110 forms inductor 112. Pattern 110 includes solidwires 118 and gaps 119 between the solid wires. Strands 104 may be wovenbetween wires 118, such as through gaps 119. Such weaving may includeweaving wires 118 through strands 104. Such weaving may form a sheet ofcloth or fabric that includes strands 104 woven with wires 118. It canbe appreciated that various other patterns of weaving can be used, suchas those known for weaving non-conductive strands and clothing fibers.

Pattern 110 includes inner diameter 114 and outer diameter 116, topsurface 115 and bottom surface 117. Inner diameter 114 may be defined bya circular shape perimeter of the inner portion of pattern 110. Outerdiameter 116 may be defined by the outer perimeter shape of pattern 110.Surface 115 may be defined by the top perimeter shape of pattern 110.Surface 117 may be defined by the bottom perimeter shape of pattern 110.Board 100 includes top surface 150, side surfaces 151 and 152 and bottomsurface 153. Gap 155 is shown between top surface 150 of the board andtop surface 115 of inductor pattern 110. Gap 157 is shown betweensurface 153 and surface 117.

In some cases, pattern 110 includes an inductor pattern having a Toroidpattern of wires of solid conductor material configured to low passfilter (e.g., pass high frequency but not low frequency signals),de-noise, stabilize or communicate high frequency data signals, graphicssignals, Graphics Double Data Rate (GDDR) memory signals, alternatingcurrent (AC) signals, video signals, and/or audio signals.

Diameter 116 of the inductor may be between 100 and 250 microns. Largerdiameters may have higher induction (which may be bad for highfrequencies, but good for direct current).

According to some embodiments, inductor pattern 110 is a pattern ofsolid conductor material wires 118 woven into or having a Toroid patternthat has an inner circular top cross sectional diameter 114 and an outercircular top cross sectional diameter 116; a top surface 115 between theinner diameter and the outer diameter, and a bottom surface 117 betweenthe inner diameter and the outer diameter. In some cases, the topsurface 115 is a side cross sectional flat surface below a planarizedtop surface 150 of the board (with an optional input or output wireextending to the surface), and bottom surface 117 is a side crosssectional flat surface below a planarized bottom surface 153 of theboard (with an optional input or output wire extending to the surface).

It can be appreciated that various other shapes for diameters 114 and116; surfaces 115 and 117; and pattern 110 can be used. It can beappreciated that surfaces 115 and 117 can have a side cross sectionalshape that is flat, concave, convex, or S curved. It can be appreciatedthat diameters 114 and 116 can have a top cross sectional shape that issquare, rectangular, oval or egg-shaped. It can be appreciated that thevertical strands of solid wires 118 shown in FIG. 1B can have a sidecross sectional shape that is flat, concave, convex, or S curved.

In some cases, wires 118 include an input wire and an output wire for orto inductor 112. The input and output wires may be wires further wovenor used to form wires 121 and 122. The input and output wires may extendto the top surface 150 and/or bottom surface 153 of the board. In somecases, the input wire may be on or extend to the top or bottom surface;and the output wire may be on or extend to the opposite surface. In somecases, the input wire may be on or extend to the top or bottom surface;and the output wire may be on or extend to the same surface. The inputand output wires may be segmented during planarization. It can beappreciated that the exposed ends of the input and output wires at or onthe surfaces may be connected to electrical interconnects, traces orcontacts formed in or on surfaces of board 100.

Pattern 120 includes wires 121 and 122. It can be appreciated that otherpatterns of wires can be used. Non-conductive strands 106 are shownwoven between wires 121 and 122, or pattern 120. Such weaving mayinclude weaving wires 121 and 122 through strands 106. Such weaving mayform a sheet of cloth or fabric that includes strands 106 woven withwires 121 and 122.

In some cases, pattern 120 includes a solid wire pattern of conductivestrands of solid conductor material that are configured to pass, send orcommunicate power signals, direct current (DC) signals, bias signals,and/or ground signals. Wire 121 is shown having outer diameter 124. Wirediameter 124 may be between 5 and 20 microns. Some cases may requirelarger diameter, such as between 10 and 20 microns, for higher powerdensity.

It can be appreciated that wires 121 and 122 may have a circular,square, rectangular, oval or other top cross sectional shape. In somecases, wire 121 may represent a wire; a co-axial connector or wire; awire part of an inductor patter; or a plated through hole (PTH) formedthrough a circuit board. It can be appreciated that various otherpatterns of weaving can be used, such as those known for weavingnon-conductive strands and clothing fibers.

Wire pattern 130 includes coaxial strand 131 and 132. Non-conductivestrands 108 are shown woven between strands 131 and 132. Such weavingmay include weaving strands 131 and 132 through strands 108. Suchweaving may form a sheet of cloth or fabric that includes strands 108woven with strands 131 and 132. It can be appreciated that various otherpatterns of weaving can be used, such as those known for weavingnon-conductive strands and clothing fibers.

Strand 131 is shown having solid conductor material wire 146, havingouter diameter 136 surrounded by or encased in dielectric or insulator144, surrounded by or encased in conductor 142. Conductor 142 may beconsidered an outer shield cylinder of conductor material surroundingthe core of wire 146. Conductor 142 is shown having outer diameter 133and inner diameter 134. Insulator 144 is shown formed in betweendiameters 136 and 134.

In some cases, pattern 130 includes a co-axial pattern of conductivestrands of co-axial conductor materials configured to pass, send orcommunicate high frequency data signals, graphics signals, GraphicsDouble Data Rate (GDDR) memory signals, alternating current (AC)signals, video signals, and/or audio signals.

The outer diameter 133 of the coaxial strand may be between 50 and 70microns. Diameter 136 may be less than or equal to 50 microns. Diameter134 may add between 15 and 20 microns per side around diameter 136.Diameter 133 may add between 10 and 20 microns of conductive material,per side, around diameter 136. In some cases, diameter 133 may bebetween 100 and 250 microns. Larger diameters may have higher induction(which may be bad for high frequencies, but good for direct current).

It can be appreciated that other top cross sectional shapes for wire146, insulator 144, and conductor 142 can be used. For example, they canhave a square, rectangular, oval, egg-shaped, cross sectional shape.

Some embodiments of board 100 provide an in build toroid shaped inductorpattern 110 into the substrate core (e.g., board 100). Inductor pattern110 may be an in build along with other substrate features such asplated through hole (PTH) with filled copper (e.g., wires 121 and 122),co-axial PTH with optimized dielectric in between the electrodes (e.g.,strands 131 and 132).

Some embodiments of pattern 110 provide an approach to integrate aninductor structure into the substrate core. This may be achieved byweaving the glass fibers and copper wires simultaneously followed byimpregnating resin with filler in the weave. This resin impregnation canbe done by several techniques such as pressure molding the advancedmaterials needed (if any) to the selected area of the weaved fabric andthen dipping the weave into the core resin (typically epoxy basedmaterials with silica fillers). Once the core is cured the panels can beground on front and back side surface and, then the planar surface ofthe substrate can be copper plated for interconnect, trace and contactfeatures.

In some embodiments, a key to achieving various technology features inthe substrate core lies in what type of conductors are getting wovenwith glass fibers. Weaving technology use may be very similar to theweaving of the garments where multiple fiber strands are used. Weavingtechnology is old, but recent changes to the technology allows theweaving multiple strands of fibers (glass fiber and a conductor wiresuch as copper) into the pattern of choice. The conductor wire(s) can bewoven in (e.g., include conductive strands woven in) the z direction ofthe substrate and the glass fibers can be woven in (e.g., includenon-conductive strands woven in) the x-y direction of the substrate(please refer to FIGS. 1-3). The glass fibers in addition to providingthe mechanical strength to the substrate can hold the conductors wiresin place during the resin impregnation process. The weaving of variouspatterns can lead to the electrical components in the core, makingsubstrate core more electrical feature rich (as briefly described forFIG. 1). Also, multiple types of electrical conductors can be weavedsimultaneously, such as combinations of (i) solid copper wires can actas the filled vertical interconnect can replace the typical platedthrough hole (PTH) of the substrate (e.g., pattern 120), (ii) co-axialwires with pre-coated copper and dielectric on the solid central wirefor very high speed signals (e.g., pattern 130), and (iii) weaving solidcopper wires in to the shape of the toroid shape to make it an inductor(e.g., pattern 110). One proposed process flow to enable this innovationis shown in FIG. 4.

In some cases, board 100 includes a pattern or weave including anon-conductive board pattern of non-conductive strands (e.g. strands104, 106 and 108) horizontally woven between a component pattern ofconductive strands (e.g. pattern 110, 120, and 130). In some cases sucha circuit board weave is (e.g., only includes) or includesnon-conductive strands 104 and 106 woven between pattern 110 and 120. Insome cases it is (e.g., only includes) or includes strands 104 and 108between pattern 110 and 130. In some cases it is (e.g., only includes)or includes strands 106 and 108 woven between pattern 120 and 130. Insome case it is (e.g., only includes) or includes only strands 104 wovenbetween pattern 110. In some cases it is (e.g., only includes) orincludes only strands 108 woven between pattern 130.

Resin may be impregnated or laminated within or through the circuitboard pattern of non-conductive or conductive strands. The resin may becured to form a solid circuit board, as board 100. Impregnating andcuring may be done as known in the art. Top surface 150 and bottomsurface 153 may be planar surfaces in some cases, surfaces 150 and 153are planarized such as by chemical, mechanical, or other planarizingtechniques as known in the art. Such planarizing may segment conductivestrands of pattern 120 and 130 such that the wires and coaxial strandsextend from surface 150 to 153, but do not reenter board 100. However,such planarizing may leave intact wires 118, except for an input andoutput to conductor pattern 110. Additional descriptions ofimpregnating, curing and planarizing are provided below.

Thus, board 100 may be described as a planarized cure composite materialwith an upper planed surface 150, a lower planed surface 153, andelectrically conducted strand segments of pattern 120 and 130 extendingfrom the upper to the lower surface. Board 100 may also include wires118 within the board, but not extending to the upper and lower surface(except, optionally, the input and output wires extending to thesurfaces). It can be appreciated that the exposed ends of conductivestrands of pattern 110 (e.g., optionally, the input and output wires),120 and 130 at or on surfaces 150 and 153 may be connected to electricalinterconnects, traces or contacts formed in or on surfaces of board 100.In some cases, the electrical interconnects, traces or contacts areformed in or on surfaces of board 100 at the locations of the exposedends of conductive strands of patterns 110, 120 and 130.

FIG. 2A shows conductive strands of FIGS. 1A and 1B having sets ofnon-conductive strands woven between them. Coaxial strand 131 is shownhaving outer diameter 133 and outer surface 232. Wire 122 is shownhaving outer diameter 124 and surface 224 between strand 131 and wire122. Wire 121 is shown having surface 221. Set of non-conductive strands210 are shown woven horizontally between strands 131, 121 and 124 inpattern 216. Set of non-conductive strands 220 are shown woven betweenconductive strands 131, 121 and 124 in pattern 226. It can beappreciated that patterns 216 and 226 are mirror images with respect tothe longitudinal axes of strands 131, 121 and 134. It can be appreciatedthat various other patterns of weaving can be used, such as those knownfor weaving non-conductive strands and clothing fibers.

Set of strands 210 includes strand 211, 212, 213 and 214. Set 220includes strands 221, 222, 223 and 224. Although four strands are shownin each set, it can be appreciated that various other numbers of strandscan be used. Although strands 210 and 220 are shown with pattern 216 and226, it can be appreciated that other patterns can be used. Set ofstrands 210 and 220 may represent strands 106 or 108. In some cases theyrepresent both strands 106 and 108. In some cases strands 210 and 220represent a weaving pattern for strands 104.

FIG. 2B shows an inductive pattern of wires of FIGS. 1A and 1B, havingsets of non-conductive strands woven between them. FIG. 2B showsinductive pattern 110 of solid wires 118 of FIGS. 1A and 1B, having setsof non-conductive strands woven between them. FIG. 2A shows wires 118having strands 104 woven between them. Strands 104 includenon-conductive strands 241, 242 and 243. Strands 104 are shown wovenbetween wires 118 and pattern 246. Strands 104 may be considered woventhrough gaps 119 between wires 118. It can be appreciated that variousother patterns of weaving can used, such as those known for weavingnon-conductive strands and clothing fibers.

In some cases, FIGS. 2A and 2B, show a schematic depiction of multipletypes of conductors (e.g., conductive strands) in a pair of glass fiberstrands (e.g., non-conductive strands). The glass fiber strands may havedual functions, such as to (1) provide mechanical integrity to thesubstrate core as a function of the glass fibers, and (2) providesupport to vertical conductors to keep them position fixed (e.g., x,y;or x,y,z) during the resin filling process which may be a critical partof substrate core manufacturing. In some cases, the glass fiber strandsto provide reinforcement and to keep conductors in fixed position duringresin filling.

In some cases the non-conductive board pattern includes at leasthorizontally woven or disposed strands between, throughout, within,around, or woven with the conductive strands. In some cases the circuitboard weave includes the non-conductive strands woven in an X,Ydirection between the conductive strands to form the circuit boardpattern, and wearing the conductive strands in a Z direction, such thatit leaves some of the conductive strands extend from a top surface to abottom surface of the circuit board pattern. In some cases thenon-conductive strands are glass fibers. In some cases the conductivestrands are wire and/or coaxial strands.

In some cases, the non-conductive strands include a first set ofvertically adjacent parallel non-conductive strands (e.g., set 210)woven or disposed horizontally between the conductive strands in a firstpattern (e.g., pattern 120, 130 and/or 110); and a second set ofvertically adjacent parallel non-conductive strands (e.g., set 220)woven horizontally between the conductive strands in a second patternthat is a horizontal mirror image of the first pattern with respect to avertical or Z direction. The two sets may be described as having inopposing patterns with respect to the conductive strands.

Some embodiments described herein provide a substrate package that canreplace prior substrate cores with a core that has more active featuresin it, including a mix of inbuilt inductors, co-axial verticalinterconnects, and filled through holes (e.g., wires). All thesefeatures may increase value the substrate core adds to the overallsubstrate package and may eliminate some surface mount passives (e.g.,shorts caused by prior PTH designs or manufacturing). One benefit of theembodiments described herein is that they may not require anymodification of the existing lines at substrate manufacturers. Theembodiments (e.g., board 100, pattern 102; fabric 300, 500 or 501) canbe implemented at or by a core manufacturer, and the finished cores canbe sent to a substrate manufacturer for interconnect and top layer(contact and trace) patterning and making of the subsequent build-uplayers.

FIGS. 3A and 3B are simplified top and side view representations,respectively, of a two-layer woven fabric produced by a weaving processof a process, according to embodiments described herein. FIGS. 3A and 3Bare simplified representations of an exemplary woven fabric 300, with anupper surface 302 and lower surface 304 formed by weaving a plurality ofelectrically non-conductive strands (shown as 306 a and 306 b) andelectrically conductive strands 308 (e.g., in accordance with block 410of FIG. 4). In some cases, fabric 300 is the fabric used to form circuitboard 100 and has circuit board pattern 102 of non-conductive strands104, 106 and 108 woven between component patterns including inductorwire strand pattern 110, conductive wire pattern 120, and co-axial wirepattern 130. In some cases, strands 306 a and 306 b may represent anyone or more of strands 104, 106, and 108. In some cases, strands 308 mayrepresent any one or more of wires 118, wires of pattern 120, coaxialstrands of pattern 130.

In some embodiments of FIGS. 3A and 3B, the electrically conductivestrands include conductive wire strands 121 and co-axial strands 131that are woven such that they extend from upper surface 302 of wovenfabric 300 to the lower surface 304 of woven fabric 300. In addition,the weaving of these electrically conductive strands 308 may result in“loops” (i.e., “U” shaped segments) of electrically conductive strands308 at the upper and lower surfaces of woven fabric 300 (not shown).

In some embodiments of FIGS. 3A and 3B, the electrically conductivestrands include inductor patterned strands 118 that are woven such thatthey do not extend to upper surface 302 of woven fabric 300, or to thelower surface 304 of woven fabric 300. In addition, the weaving of theseelectrically conductive strand 308 may result in “loops” (i.e., flatshaped segments such as surface 115 and 117) of electrically conductivestrand 308 below the upper and lower surfaces of woven fabric 300.

In the embodiment of FIGS. 3A and 3B, woven fabric 300 is a double-layerwoven fabric that includes top layer 310 and bottom layer 312. Top layer310 and bottom layer 312 may be essentially woven together byelectrically conductive strand 308, which passes back and forth betweentop layer 310 and bottom layer 312.

In some cases, the plurality of electrically non-conductive strandsincludes “fill” strands 306 a disposed in the off-machine direction andwarp strands 306 b disposed in the machine direction. The fill strandsand warp strands are characterized as “crimped” since they are bent atthe points where they cross one another.

In some cases, if desired, the plurality of electrically non-conductivestrands can also include “uncrimped” strands (not shown in theembodiment of FIGS. 3A and 3B) disposed in the machine direction betweentop layer 310 and bottom layer 312 and/or uncrimped fill strands.Uncrimped strands disposed in the machine direction can providemechanical reinforcement for the woven fabric and final PCB substrate.

By employing multiple layers (e.g., top layer 310 and bottom layer 312),electrically conductive strands 308 are forced into a vertical positionas they pass from the top layer to the bottom layer. As will be evidentfrom the discussion below, such a vertical position results, afterplanarizing, in an electrically conductive strand segment(s) that isalso positioned vertically. Such a vertically positioned electricallyconductive strand segment is, therefore, configured to function as avertically positioned electrically conductive via.

Although FIGS. 3A and 3B illustrate a weave that results in a wovenfabric with a woven pattern that follows a square grid array, processesaccording to the present embodiments of the invention can employ anysuitable weaving technique known to one skilled in the art and canresult in a woven fabric with regular or irregular woven pattern. Forexample, a Jacquard weaving technique can be employed to form a wovenfabric with regular or irregular woven patterns or a multi-layer wovenfabric can be formed in the weaving process. In addition, the diameterand/or type of each of the electrically non-conductive strands andelectrically conductive strands can be equal and constant throughout thewoven fabric or can vary.

In the embodiment of FIG. 3, the plurality of electrically conductivestrand segments are disposed in the planarized woven fabric in a regularpattern. However, the plurality of electrically conductive strandsegments can also be disposed in an irregular pattern.

Strands 306A and 306B shown in layer 310 and layer 312 may represent anyof strands 104, 106, and 108. For example, the pattern shown in FIG. 3Aand 3B may be used in place of the pattern shown in FIG. 2A or 2B. Itcan be appreciated that other patterns may be used, such as patternsknown for weaving non-conductive strands or clothing fibers.

FIG. 4 is a flow chart illustrating process 400 for manufacturing apackage substrate in accordance with an exemplary embodiment of thepresent invention. Process 400 may be a process for forming a circuitboard, a PCB, a substrate package, or a substrate core. Process 400first includes, at block 410, weaving a plurality of electricallynon-conductive strands and at least one electrically conductive strand(e.g., a wire strand, co-axial strand, and/or inductor patterned strand)to form a woven fabric. Block 410 may include laying out or locating theconductive strands at predetermined locations to form the wires, coaxstrands, and inductor pattern wires. Such layout may include designingor preselecting the location and weave pattern for the conductors. Block410 may also include weaving a mesh pattern of the non-conductivestrands and conductive strands to form a cloth of one or morenon-conductive strands woven between any two conductive strands.

FIG. 5A shows a fabric for a circuit board having electricallynon-conductive strands woven between or with electrically conductivestrands, prior to resin impregnation, according to embodiments describedherein. Board 500 is shown having non-conductive strands 504 woven withconductive strands 508. Board 500 may represent board 100 or 300.Strands 504 may represent any or all of strands 104, 106, and 108.Conductive strands 508 may represent any of wires 118; wires 121 and122; and/or strands 131 and 132.

Block 410 may include weaving wires 118 including an input wire and anoutput wire for inductor 112 that extend to or beyond the top surface150 and/or bottom surface 153 of the board. These input and output wiresmay be segmented during planarization at block 440.

The resultant woven fabric may have its upper and lower surfacesexposed. Weaving block 410 can form the woven fabric using any suitableweaving technique including, for example, a single layer or amulti-layer based weaving technique, Dobby or a Jacquard-based weavingtechnique. The use of a Jacquard-based weaving technique enables theformation of woven fabrics wherein the electrically non-conductivestrands and electrically conductive strand(s) are selectively arrangedin either of an irregular woven pattern or a regular woven pattern.Weaving block 410 can be conducted using conventional weaving equipmentknown to one skilled in the art.

The electrically non-conductive strands employed in processes accordingto embodiments of the present invention can be any suitable electricallynon-conductive strands including fibers, filaments or yarns formed ofglass (e.g., fiberglass, S-glass or E-glass), polyester or otherpolymers, Teflon or Kevlar. Exemplary commercial electricallynon-conductive strands include Type 1064 Multi-End Roving and Hybon 2022Roving available from PPG Industries.

If a glass strand is employed, it can be optionally treated with silaneto improve its adhesive properties to the impregnating resin. Oneskilled in the art will recognize that the electrical characteristics ofthe electrically non-conductive strand are a factor in determining thedielectric constant of the PCB substrate.

The thickness of the electrically nonconductive strand is dependent onthe weaving technique employed and the thickness of the packagingsubstrate being manufactured. A typical thickness, where E-glass-basedelectrically non-conductive fiber are employed, is in the range of 1microns to 20 microns.

The electrically conductive strand(s) employed in block 410 can be anysuitable conductive strand including, but not limited to wire strands121 and 122; co-axial strands 131 and 132; and inductor patternedstrands 118. These strands may include a conductor or material such as acopper wire, gold wire, aluminum wire, an electrically conductivepolymer wire or a combination thereof. The diameter of the strandsdepends on the thickness of the substrate being manufactured and thedesired density of electrically conductive vias disposed therein. Atypical diameter, however, is in the range of 15 microns to 200 microns.

The electrically conductive strands can either (i) replace a strand thatwould normally be included in a conventional woven fabric (e.g., astrand that is normally used in a plain weave) or (ii) be implemented asan additional strand beyond those normally included in the pattern ofthe woven fabric.

The thickness of the woven fabric formed in block 410 may bepredetermined based on the required substrate thickness. A typicalthickness of the woven fabric is, however, in the range of 0.5 mm to 10mm. In some cases, the thickness is a thickness typically used toproduce a circuit boards or package substrates.

Block 410 may include forming a circuit board pattern or fabric (e.g., aweave) including a non-conductive board pattern of non-conductivestrands (e.g., glass fibers) at least horizontally woven between (e.g.,throughout, within, around or with) a component pattern of conductivestrands (e.g., wires and co-axial strands).

Next, at block 420, the woven fabric may be impregnated with a resinmaterial to form an impregnated fabric. Block 420 may include dippingthe circuit board pattern, fabric, or cloth in and epoxy resin, and thensqueezing or applying pressure to both sides of the cloth. Squeezing thecloth may help ensure that the resin is infused into all the spacesbetween the conductive and non-conductive strands, and to ensure thatany air or gas is eliminated from between the strands.

FIG. 5B shows the fabric of FIG. 5A after resin impregnation, accordingto embodiments described herein. Fabric 501 is shown havingnon-conductive strands 504 and conductive strands 508 impregnated withresin 510. Thus, fabric 501 may be board 500 having pattern 102 or afabric of conductive and non-conductive strands woven together, afterimpregnating the fabric with resin.

The resin material can be any suitable resin material known to oneskilled in the art including, for example, epoxy-based resins,bis-mali-imide based resins, Per-Fluoroalkane resins and polyimideresins. Impregnation of the woven fabric with the resin material can beaccomplished using conventional techniques. The term “impregnating”refers to the act of filling throughout, saturating or permeating anobject (e.g., a woven fabric).

Block 420 may include impregnating or laminating a circuit board pattern(e.g., fabric 500 or pattern 102) with resin. This may form animpregnated circuit board pattern (e.g., having resin infused within,through, or throughout the circuit board pattern).

Next, at block 430 the impregnated fabric may be cured to form a curedfabric. Block 430 may include curing in an oven at between 170 and 180degree Celsius. Block 430 may include providing the substrate with a“hand” that is a preselected or predetermined hand.

The curing can be accomplished, for example, using conventional thermaland/or ultraviolet curing techniques. Although curing process parametersare dependent on the resin material used to impregnate the woven fabric,curing block 430 is typically conducted in a nitrogen or air ambient, ata temperature in the range of 125 degrees Celsius to 200 degreesCelsius, and for a time period in the range of 15 minutes to 2 hours.

Block 430 may include curing the resin to form a cured circuit boardpattern (e.g., cured fabric 501 or pattern 102). Block 430 may includecuring the impregnated circuit board pattern (e.g., cured fabric 501 orpattern 102) to form a cured composite material (e.g., board 100 orpattern 102).

At block 440, after curing of the impregnated fabric, the upper andlower surfaces of the cured fabric may be planed or planarized. Block440 may include planarizing a top surface and a bottom surface of thecured circuit board pattern to form circuit board 100 having components(e.g., wired, co-axial strands, and inductors) in circuit board pattern102. Block 440 may include planarizing the surfaces to segment at leastone wire or co-axial strand woven over top and bottom surface of thecircuit board pattern. Block 440 may include segmenting wires 118 thatare an input wire and an output wire for inductor 112 that extend to orbeyond the top surface 150 and/or bottom surface 153 of the board. Block440 may include forming a planarized cured composite material board 100with an upper planed surface 150, a lower planed surface 153 and aplurality of electrically conductive strand segments (e.g., wire orco-axial strands) extending from the upper planed surface to the lowerplaned surface.

FIG. 5C shows the fabric of FIG. 5B after curing the resin andmechanical planarization of the top and bottom surface, according toembodiments described herein. FIG. 5C shows board 100 having top surface150 and bottom surface 153, which may be formed by curing the resinimpregnated into fabric 501; then planarizing the top and bottom surfaceof board 501. Wires 121 and 122, and coaxial strands 131 and 132 areshown extending from the top to bottom surface. It can be appreciatedthat board 100 may also include wires 118 of inductor pattern 110, suchas shown in FIGS. 1A and 1B. FIG. 5C also shows non-conductive strands504 and cured resin 510.

The term “planing” or “planarizing” may refer to removing the surface(s)of an object (e.g., a cured fabric). This planing block may serve tosegment the at least one conductive strand and form a substrate 100 thatincludes a planarized cured fabric or pattern 102 with an upper planedsurface 150, a lower planed surface 153 and a plurality of conductivestrand segments (e.g., wire strands, co-axial strands, and/or inductorpatterned strands) created from the at least one conductive strand. Someof the conductive strand segments (e.g., wire strands and/or co-axialstrands) extend from the upper planed surface to the lower planedsurface and may serve as electrically conductive vias of the substrate.In other words, the planing process removes each of the “reentrantloops” of these electrically conductive strands at the upper and lowersurfaces of the woven fabric, leaving a plurality of electricallyconductive strand segments (vias). Some of the conductive strandsegments (e.g., inductor patterned strands) do not extend to the upperplaned surface or to the lower planed surface and may serve aselectrically conductive wires of an inductor formed within the height orthickness of the substrate, after planarizing the cured fabric. In somecases, there are input and output wires to the inductor patternedstrands that do extend to the upper and or lower planed surfaces. Insome cases, these input and output wires do not extend to those surfacesbut are connected to other conductive strands (e.g., of pattern 120 or130) between the board surfaces.

The planarizing can be accomplished using grinding techniques, lappingtechniques and/or milling techniques (often referred to as “scalping”)known to one skilled in the art. The planing process can remove, forexample, 1.0 mm to 0.5 mm from each of the upper and lower surfaces ofthe cured fabric. Exemplary but non-limiting dimensions for substrate100 are a thickness of 0.8 mm, an electrically conductive strand segmentpitch of 1.0 mm and an electrically conductive strand segment diameterof 70 microns for wires 121, 122 and 118.

It can be appreciated that after planarizing, the exposed ends ofconductive strands of patterns 110, 120 and 130 at or on surfaces 150and 153 may be connected to electrical interconnects, traces or contactsformed in or on surfaces of board 100. In some cases, the electricalinterconnects, traces or contacts are formed in or on surfaces of board100 at the locations of the exposed ends of conductive strands ofpatterns 110, 120 and 130.

Forming inductive pattern 110 within board 100 provides advantagesincluding filtering signals between the top and surface of the board sothat discreet capacitors are not required on the dye side of the board,or on the motherboard below the packaging substrate; and providing morestable power signaling between the top and bottom surface of the board.In addition, forming wires 121 and 122 provides stable and good powersignal transfer (e.g., direct current or ground) between the top andbottom surface of the board. In addition, forming coaxial strands 131and 132 provide more stable and better high frequency signal transferbetween the top and bottom surfaces of the board. Such signals may havea frequency of greater than or equal to one gigabyte per second. Suchsignals may include high frequency video, graphics, audio, GDDR, memory,and other high frequency signals. Other advantages include thenon-conductive fibers holding the weaved pattern (e.g., pattern 102) ofthe conductive fibers in place, at desired locations during resinimpregnation and curing. Other advantages include forming patterns 110,120 and 130 with conductive strands extending to the surfaces of board100 without drilling, plating, or via forming into surfaces 150 and 153of the board. In addition, forming wires 121 and 122; the coaxialstrands 131 and 132; or the input output wires to pattern 110 may: (1)avoid sharp edges at the surfaces of the board, that are formed whenplated through holes are drilled and plated with conductor; and (2)avoid forming cavities and filling the cavities, which can lead tocracks in the board due to moisture during manufacture and during use.

FIG. 6 illustrates a computing device in accordance with oneimplementation. The computing device 600 houses board 602. Board 602 mayinclude a number of components, including but not limited to processor604 and at least one communication chip 606. Processor 604 is physicallyand electrically connected to board 602. In some implementations atleast one communication chip 606 is also physically and electricallyconnected to board 602. In further implementations, communication chip606 is part of processor 604.

Depending on its applications, computing device 600 may include othercomponents that may or may not be physically and electrically connectedto board 602. These other components include, but are not limited to,volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flashmemory, a graphics processor, a digital signal processor, a cryptoprocessor, a chipset, an antenna, a display, a touchscreen display, atouchscreen controller, a battery, an audio codec, a video codec, apower amplifier, a global positioning system (GPS) device, a compass, anaccelerometer, a gyroscope, a speaker, a camera, and a mass storagedevice (such as hard disk drive, compact disk (CD), digital versatiledisk (DVD), and so forth).

Communication chip 606 enables wireless communications for the transferof data to and from computing device 600. The term “wireless” and itsderivatives may be used to describe circuits, devices, systems, methods,techniques, communications channels, etc., that may communicate datathrough the use of modulated electromagnetic radiation through anon-solid medium. The term does not imply that the associated devices donot contain any wires, although in some embodiments they might not.Communication chip 606 may implement any of a number of wirelessstandards or protocols, including but not limited to Wi-Fi (IEEE 802.6family), WiMAX (IEEE 802.16 family), IEEE 802.20, long term evolution(LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT,Bluetooth, derivatives thereof, as well as any other wireless protocolsthat are designated as 3G, 4G, 5G, and beyond. Computing device 600 mayinclude a plurality of communication chips 606. For instance, a firstcommunication chip 606 may be dedicated to shorter range wirelesscommunications such as Wi-Fi and Bluetooth and a second communicationchip 606 may be dedicated to longer range wireless communications suchas GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.

Processor 604 of computing device 600 includes an integrated circuit diepackaged within processor 604. In some implementations, the integratedcircuit die is mounted on and electrically connected to a substratepackage having wire strands, co-axial strands, and/or inductor patternedstrands as described with reference to FIGS. 1-5. The package mayinclude or be board 100. It may be formed of or include fabric 300,fabric 500 or fabric 501. The term “processor” may refer to any deviceor portion of a device that processes electronic data from registersand/or memory to transform that electronic data into other electronicdata that may be stored in registers and/or memory.

Communication chip 606 also includes an integrated circuit die packagedwithin communication chip 606. In accordance with anotherimplementation, a package including a communication chip mounted on andelectrically connected to a substrate package having wire strands,co-axial strands, and/or inductor patterned strands as described withreference to FIGS. 1-5.

In further implementations, another component housed within computingdevice 600 may contain a microelectronic package including an integratedcircuit die mounted on and electrically connected to a substrate packagehaving wire strands, co-axial strands, and/or inductor patterned strandsas described with reference to FIGS. 1-5.

In various implementations, computing device 600 may be a laptop, anetbook, a notebook, an ultrabook, a smartphone, a tablet, a personaldigital assistant (PDA), an ultra mobile PC, a mobile phone, a desktopcomputer, a server, a printer, a scanner, a monitor, a set-top box, anentertainment control unit, a digital camera, a portable music player,or a digital video recorder. In further implementations, computingdevice 600 may be any other electronic device that processes data.

EXAMPLES

The following examples pertain to embodiments.

Example 1 is a method of forming a circuit board comprising: forming acircuit board pattern including a non-conductive board pattern ofnon-conductive strands woven between a component pattern of conductivestrands; wherein the component pattern includes one of (a) co-axialstrands having a dielectric material between a solid conductor materialwire and an outer shield cylinder of conductor material surrounding thesolid conductor material wire or (b) an inductor pattern of solidconductor material wires.

In Example 2, the subject matter of Example 1 can optionally includeimpregnating the circuit board pattern with resin to form an impregnatedcircuit board pattern; curing the impregnated circuit board pattern toform a cured circuit board pattern; and planarizing a top surface and abottom surface of the cured circuit board pattern to form a circuitboard.

In Example 3, the subject matter of Example 2 can optionally includewherein planarizing includes: segmenting at least one of (a) a co-axialstrand, or (b) a solid conductor material wire of the inductor pattern;and forming a planarized cured composite material with an upper planedsurface, a lower planed surface and a plurality of electricallyconductive strand segments extending from the upper planed surface tothe lower planed surface.

In Example 4, the subject matter of Example 1 can optionally includewherein forming includes weaving the non-conductive strands in an X,Ydirection between the conductive strands to form the circuit boardpattern, and weaving the conductive strands in a Z direction such thatat least some of the conductive strands extend from a top surface to abottom surface of the circuit board pattern and are woven over the topand the bottom surface of the circuit board pattern.

In Example 5, the subject matter of Example 1 can optionally includewherein the non-conductive strands comprise a first set of verticallyadjacent parallel non-conductive strands woven horizontally between theconductive strands in a first pattern, and a second set of verticallyadjacent parallel non-conductive strands woven horizontally between theconductive strands in a second pattern that is a horizontal mirror imageof the first pattern with respect to a vertical direction.

In Example 6, the subject matter of Example 1 can optionally includewherein the conductive strands include wire strands of solid conductormaterial wires.

In Example 7, the subject matter of Example 1 can optionally includewherein the inductor pattern includes a Toroid pattern formed by a solidconductor material wire; wherein the Toroid pattern has a Toroid innerdiameter, a Toroid outer diameter, a Toroid top surface between theinner diameter and the outer diameter, and a Toroid bottom surfacebetween the inner diameter and the outer diameter.

In Example 8, the subject matter of Example 7 can optionally includewherein the Toroid top surface is below a planarized top surface of theboard, and the Toroid bottom surface is below a planarized bottomsurface of the board.

In Example 9, the subject matter of Example 1 can optionally includewherein the inductor pattern includes an input wire extending to a firstsurface of the board, and an output wire extending to a second surfaceof the board; and wherein planarizing includes segmenting the input andoutput wires.

Example 10 is a circuit board comprising: a circuit board patternincluding a non-conductive board pattern of non-conductive strands wovenbetween a component pattern of conductive strands; wherein the componentpattern includes one of (a) co-axial strands having a dielectricmaterial between a solid conductor material wire and an outer shieldcylinder of conductor material surrounding the solid conductor materialwire or (b) an inductor pattern of solid conductor material wires; curedresin impregnated within the circuit board pattern; a top planar surfaceof the circuit board pattern; and a bottom planar surface of the circuitboard pattern.

In Example 11, the subject matter of Example 10 can optionally includewherein the circuit board pattern includes the non-conductive strandswoven in an X,Y direction between the conductive strands, and theconductive strands woven in a Z direction such that at least some of theconductive strands extend from a top surface to a bottom surface of thecircuit board pattern.

In Example 12, the subject matter of Example 10 can optionally includewherein the non-conductive strands comprise a first set of verticallyadjacent parallel non-conductive strands woven horizontally between theconductive strands in a first pattern, and a second set of verticallyadjacent parallel non-conductive strands woven horizontally between theconductive strands in a second pattern that is a horizontal mirror imageof the first pattern with respect to a vertical direction.

In Example 13, the subject matter of Example 10 can optionally includewherein the conductive strands include wire strands of solid conductormaterial wires.

In Example 14, the subject matter of Example 10 can optionally includewherein the inductor pattern includes a Toroid pattern formed by a solidconductor material wire; wherein the Toroid pattern has a Toroid innerdiameter, a Toroid outer diameter, a Toroid top surface between theinner diameter and the outer diameter, and a Toroid bottom surfacebetween the inner diameter and the outer diameter; and wherein theToroid top surface is below a planarized top surface of the board, andthe Toroid bottom surface is below a planarized bottom surface of theboard.

In Example 15, the subject matter of Example 10 can optionally includewherein the inductor pattern includes an input wire extending to a firstsurface of the board, and an output wire extending to a second surfaceof the board.

In Example 16, the subject matter of Example 10 can optionally includewherein the circuit board pattern includes: a solid wire pattern ofconductive strands of solid conductor material configured to pass powersignals or ground signals; a co-axial pattern of conductive strands ofco-axial conductor materials configured to pass high frequency datasignals; and an inductor pattern having a Toroid pattern of wires ofsolid conductor material configured to filter out low frequency signals.

Example 17 is a system for computing comprising: an integrated chipmounted on a substrate package, the a substrate package including: acircuit board pattern including a non-conductive board pattern ofnon-conductive strands woven between a component pattern of conductivestrands; wherein the component pattern includes one of (a) co-axialstrands having a dielectric material between a solid conductor materialwire and an outer shield cylinder of conductor material surrounding thesolid conductor material wire or (b) an inductor pattern of solidconductor material wires; cured resin impregnated within the circuitboard pattern; a top planar surface of the circuit board pattern; and abottom planar surface of the circuit board pattern.

In Example 18, the subject matter of Example 17 can optionally includewherein the circuit board pattern includes the non-conductive strandswoven in an X,Y direction between the conductive strands, and theconductive strands woven in a Z direction such that at least some of theconductive strands extend from a top surface to a bottom surface of thecircuit board pattern.

In Example 19, the subject matter of Example 17 can optionally includewherein the non-conductive strands comprise a first set of verticallyadjacent parallel non-conductive strands woven horizontally between theconductive strands in a first pattern, and a second set of verticallyadjacent parallel non-conductive strands woven horizontally between theconductive strands in a second pattern that is a horizontal mirror imageof the first pattern with respect to a vertical direction.

In Example 20, the subject matter of Example 17 can optionally includewherein the conductive strands include wire strands of solid conductormaterial wires.

In Example 21, the subject matter of Example 17 can optionally includewherein the inductor pattern includes a Toroid pattern formed by a solidconductor material wire; wherein the Toroid pattern has a Toroid innerdiameter, a Toroid outer diameter, a Toroid top surface between theinner diameter and the outer diameter, and a Toroid bottom surfacebetween the inner diameter and the outer diameter; and wherein theToroid top surface is below a planarized top surface of the board, andthe Toroid bottom surface is below a planarized bottom surface of theboard.

In Example 22, the subject matter of Example 17 can optionally includewherein the inductor pattern includes an input wire extending to a firstsurface of the board, and an output wire extending to a second surfaceof the board.

In Example 23, the subject matter of Example 17 can optionally includewherein the circuit board pattern includes: a solid wire pattern ofconductive strands of solid conductor material configured to pass powersignals or ground signals; a co-axial pattern of conductive strands ofco-axial conductor materials configured to pass high frequency datasignals; and an inductor pattern having a Toroid pattern of wires ofsolid conductor material configured to filter out low frequency signals.

In the description above, for the purposes of explanation, numerousspecific details have been set forth in order to provide a thoroughunderstanding of the embodiments. It will be apparent however, to oneskilled in the art, that one or more other embodiments may be practicedwithout some of these specific details. The particular embodimentsdescribed are not provided to limit embodiments of the invention but toillustrate it. The scope of the embodiments of the invention is not tobe determined by the specific examples provided above but only by theclaims below. In other instances, well-known structures, devices, andoperations have been shown in block diagram form or without detail inorder to avoid obscuring the understanding of the description. Whereconsidered appropriate, reference numerals or terminal portions ofreference numerals have been repeated among the figures to indicatecorresponding or analogous elements, which may optionally have similarcharacteristics.

It should also be appreciated that reference throughout thisspecification to “one embodiment”, “an embodiment”, “one or moreembodiments”, or “different embodiments”, for example, means that aparticular feature may be included in the practice of the embodiments.Similarly, it should be appreciated that in the description variousfeatures are sometimes grouped together in a single embodiment, figure,or description thereof for the purpose of streamlining the disclosureand aiding in the understanding of various inventive aspects. Thismethod of disclosure, however, is not to be interpreted as reflecting anembodiment that requires more features than are expressly recited ineach claim. Rather, as the following claims reflect, inventive aspectsof embodiments that may lie in less than all features of a singledisclosed embodiment. For example, although the descriptions and figuresabove refer to a substrate package (or core) or a process for formingsuch a substrate package, the descriptions and figures above can beapplied to other circuit boards, such as a motherboard; or circuit boardthat is larger or smaller than a substrate package. Thus, the claimsfollowing the Detailed Description are hereby expressly incorporatedinto this Detailed Description, with each claim standing on its own as aseparate embodiment of the invention.

What is claimed is:
 1. A method of forming a circuit board comprising:forming a circuit board pattern including a non-conductive board patternof non-conductive strands woven between a component pattern ofconductive strands; wherein the component pattern includes co-axialstrands having a dielectric material between a solid conductor materialwire and an outer shield cylinder of conductor material surrounding thesolid conductor material wire.
 2. The method of claim 1, furthercomprising: impregnating the circuit board pattern with resin to form animpregnated circuit board pattern; curing the impregnated circuit boardpattern to form a cured circuit board pattern; and planarizing a topsurface and a bottom surface of the cured circuit board pattern to forma circuit board.
 3. The method of claim 2, wherein planarizing includes:segmenting at least a co-axial strand; and forming a planarized curedcomposite material with an upper planed surface, a lower planed surfaceand a plurality of electrically conductive strand segments extendingfrom the upper planed surface to the lower planed surface.
 4. The methodof claim 1, wherein forming includes weaving the non-conductive strandsin an X,Y direction between the conductive strands to form the circuitboard pattern, and weaving the conductive strands in a Z direction suchthat at least some of the conductive strands extend from a top surfaceto a bottom surface of the circuit board pattern and are woven over thetop and the bottom surface of the circuit board pattern.
 5. The methodof claim 1, wherein the non-conductive strands comprise a first set ofvertically adjacent parallel non-conductive strands woven horizontallybetween the conductive strands in a first pattern, and a second set ofvertically adjacent parallel non-conductive strands woven horizontallybetween the conductive strands in a second pattern that is a horizontalmirror image of the first pattern with respect to a vertical direction.6. The method of claim 1, further comprising: forming a first pluralityof contacts on the top planar surface and coupled to the solid conductormaterial wire and to the outer shield cylinder of conductor material ofthe co-axial strands.
 7. The method of claim 1, wherein the resin is anon-conductive resin.
 8. A method of forming a circuit board comprising:forming a circuit board pattern including a non-conductive board patternof non-conductive strands woven between a component pattern ofconductive strands; wherein the component pattern includes an inductorpattern of solid conductor material wires.
 9. The method of claim 8,further comprising: impregnating the circuit board pattern with resin toform an impregnated circuit board pattern; curing the impregnatedcircuit board pattern to form a cured circuit board pattern; andplanarizing a top surface and a bottom surface of the cured circuitboard pattern to form a circuit board.
 10. The method of claim 9,wherein planarizing includes: segmenting at least a solid conductormaterial wire of the inductor pattern; and forming a planarized curedcomposite material with an upper planed surface, a lower planed surfaceand a plurality of electrically conductive strand segments extendingfrom the upper planed surface to the lower planed surface.
 11. Themethod of claim 8, wherein the inductor pattern includes a Toroidpattern formed by a solid conductor material wire; wherein the Toroidpattern has a Toroid inner diameter, a Toroid outer diameter, a Toroidtop surface between the inner diameter and the outer diameter, and aToroid bottom surface between the inner diameter and the outer diameter.12. The method of claim 11, wherein the Toroid top surface is below aplanarized top surface of the board, and the Toroid bottom surface isbelow a planarized bottom surface of the board.
 13. The method of claim8, wherein the inductor pattern includes an input wire extending to afirst surface of the board, and an output wire extending to a secondsurface of the board; and wherein planarizing includes segmenting theinput and output wires.
 14. The method of claim 8, further comprising:forming a second plurality of contacts on the top planar surface andelectrically coupled to the solid conductor material wires of theinductor pattern.
 15. The method of claim 8, wherein the resin is anon-conductive resin.
 16. A method of forming a circuit boardcomprising: forming a circuit board pattern including a non-conductiveboard pattern of non-conductive strands woven between a componentpattern of conductive strands; wherein the component pattern includesboth of (a) co-axial strands having a dielectric material between asolid conductor material wire and an outer shield cylinder of conductormaterial surrounding the solid conductor material wire and (b) aninductor pattern of solid conductor material wires.
 17. The method ofclaim 16, further comprising: impregnating the circuit board patternwith resin to form an impregnated circuit board pattern; curing theimpregnated circuit board pattern to form a cured circuit board pattern;and planarizing a top surface and a bottom surface of the cured circuitboard pattern to form a circuit board.
 18. The method of claim 17,wherein planarizing includes: segmenting at least one of (a) a co-axialstrand, or (b) a solid conductor material wire of the inductor pattern;and forming a planarized cured composite material with an upper planedsurface, a lower planed surface and a plurality of electricallyconductive strand segments extending from the upper planed surface tothe lower planed surface.
 19. The method of claim 16, wherein theinductor pattern includes a Toroid pattern formed by a solid conductormaterial wire; wherein the Toroid pattern has a Toroid inner diameter, aToroid outer diameter, a Toroid top surface between the inner diameterand the outer diameter, and a Toroid bottom surface between the innerdiameter and the outer diameter; wherein the Toroid top surface is belowa planarized top surface of the board, and the Toroid bottom surface isbelow a planarized bottom surface of the board; and wherein the inductorpattern includes an input wire extending to a first surface of theboard, and an output wire extending to a second surface of the board;and wherein planarizing includes segmenting the input and output wires.20. The method of claim 16, further comprising: forming a firstplurality of contacts on the top planar surface and coupled to the solidconductor material wire and to the outer shield cylinder of conductormaterial of the co-axial strands; and forming a second plurality ofcontacts on the top planar surface and electrically coupled to the solidconductor material wires of the inductor pattern.
 21. The method ofclaim 16, further comprising weaving the non-conductive strands betweenthe outer shield cylinder of conductor material and the inductor patternof solid conductor material wires.
 22. The method of claim 16, furthercomprising forming interconnects and traces in the circuit boardpattern, wherein the interconnects and traces connect (1) the firstplurality of the contacts to the co-axial strands and (2) the secondplurality of the contacts to the inductor pattern.
 23. The method ofclaim 16, wherein the resin is a non-conductive resin.
 24. The method ofclaim 16, further comprising: mounting an integrated chip on thesubstrate package.